The register transfer language is a language used to transfer data among different registers available in the computer. Digital System is an interconnection of hardware modules that do a certain task on the information. Modules are interconnected with common data and control paths to form a digital computer system. Micro operations are the operations executed on data stored in one or more registers.
To perform any function of the computer, a sequence of micro operations is used to describe it and the result of the operation may be to replace the previous binary information of a register or to transferred to another register. The college of computer science and applications of IIMT University, Meerut is rated among the best private university in Delhi NCR as its curriculum is designed to give good understanding of computer architecture and organization.
The internal hardware organization of a digital computer is defined by the set of registers it contains and their function, the sequence of micro operations performed on the binary information stored in the registers and the control that initiates the sequence of micro operations. So we can say that the digital computer is formed when it consists of different registers along with micro operations hardware and different control functions applied to manage it properly. Register Transfer Language (RTL) is a symbolic notation to describe the micro operation transfers among registers it also defines symbols for various types of micro operations along with the hardware that implements these micro operations.
Computer registers are designated by capital letters (sometimes followed by numerals) to denote the function of the register like R1 (processor register), MAR (Memory Address Register holds an address for a memory unit), PC (Program Counter), IR (Instruction Register), SR (Status Register). Information transfer from one register to another is described as R2 ← R1, This statement denotes a transfer of the content of register R1 into register R2, which happens in one clock cycle, The content of the R1 (source) does not change, The content of the R2 (destination) will be lost and replaced by the new data transferred from R1. Conditional transfer also occurs only under a control condition, P: R2 ← R1, A binary condition (P equals to 0 or 1) determines when the transfer occurs, content of R1 is transferred into R2 only if P is 1. The college of computer science and applications of IIMT University, Meerut is rated among the best private university in Delhi NCR, where the students are taught the basics of computer science with practical approach.